JPH0326548B2 - - Google Patents

Info

Publication number
JPH0326548B2
JPH0326548B2 JP58125289A JP12528983A JPH0326548B2 JP H0326548 B2 JPH0326548 B2 JP H0326548B2 JP 58125289 A JP58125289 A JP 58125289A JP 12528983 A JP12528983 A JP 12528983A JP H0326548 B2 JPH0326548 B2 JP H0326548B2
Authority
JP
Japan
Prior art keywords
channel transistors
basic cell
transistors
channel
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58125289A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6017931A (ja
Inventor
Shinji Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58125289A priority Critical patent/JPS6017931A/ja
Priority to EP84304668A priority patent/EP0131463B1/en
Priority to KR1019840003972A priority patent/KR890004568B1/ko
Priority to DE8484304668T priority patent/DE3477312D1/de
Publication of JPS6017931A publication Critical patent/JPS6017931A/ja
Priority to US07/008,042 priority patent/US4816887A/en
Publication of JPH0326548B2 publication Critical patent/JPH0326548B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP58125289A 1983-07-09 1983-07-09 マスタ・スライス方式に於ける基本セル Granted JPS6017931A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP58125289A JPS6017931A (ja) 1983-07-09 1983-07-09 マスタ・スライス方式に於ける基本セル
EP84304668A EP0131463B1 (en) 1983-07-09 1984-07-09 Masterslice semiconductor device
KR1019840003972A KR890004568B1 (ko) 1983-07-09 1984-07-09 마스터슬라이스형 반도체장치
DE8484304668T DE3477312D1 (de) 1983-07-09 1984-07-09 Masterslice semiconductor device
US07/008,042 US4816887A (en) 1983-07-09 1987-01-21 CMOS gate array with orthagonal gates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58125289A JPS6017931A (ja) 1983-07-09 1983-07-09 マスタ・スライス方式に於ける基本セル

Publications (2)

Publication Number Publication Date
JPS6017931A JPS6017931A (ja) 1985-01-29
JPH0326548B2 true JPH0326548B2 (en]) 1991-04-11

Family

ID=14906390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58125289A Granted JPS6017931A (ja) 1983-07-09 1983-07-09 マスタ・スライス方式に於ける基本セル

Country Status (1)

Country Link
JP (1) JPS6017931A (en])

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2714376B2 (ja) * 1985-10-16 1998-02-16 花王株式会社 スケール抑制剤
JPH0554089U (ja) * 1991-12-18 1993-07-20 市光工業株式会社 電動格納式ミラー
US5698873A (en) * 1996-03-08 1997-12-16 Lsi Logic Corporation High density gate array base cell architecture

Also Published As

Publication number Publication date
JPS6017931A (ja) 1985-01-29

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